Apostolos Fournaris

Dr. Apostolos P. Fournaris

Postdoctoral researcher
Network Architectures & Management Group
Electrical & Computer Engineering Dept
University of Patras
26500 Patras
GREECE
e-mail:
apofour [at] ece.upatras.gr

Studies

September 2002 – December 2007. Phd Degree in Electrical and Computer Engineering, University of Patras (Greece), School of Engineering, Department of Electrical and Computer Engineering.
Phd Thesis: Public Key Cryptographic System Design

September 1996 – November 2001. Diploma in Electrical and Computer Engineering, University of Patras ( Greece ), School of Engineering , Department of Electrical & Computer Engineering,
Diploma Thesis: “Methods of Indirect Frequency Synthesis using a Dual Input Phase Accumulator (D.I.P.A)”.

R & D Projects Participation

  1. Research Project: “Cyber security cOmpeteNCe fOr Research anD InnovAtion, CONCORDIA“, EU Horizon 2020 Research and innovation action project with the University of Patras
  2. Research Project: “SMESEC: cybersecurity for small and medium size Enterprises“, EU Horizon 2020 innovation action project with the University of Patras
  3. Research Project: “CIPSEC: Enhancing Critical Infrastructure Protection with innovative SECurity framework“, EU Horizon 2020 innovation action project with the University of Patras
  4. Greek Research Project: “I3T: Innovative Application of Industrial Internet of Things in Smart environments”. CRIPIS Action, GSRT, Greek Research and developmental project for Industrial Systems Institute (ISI)/ Research Centre “ATHENA”
  5. Research project: “RADIO:  Robots in Assisted Living Environments Unobtrusive, Efficient, Reliable and Modular Solutions for Independent Ageing”, EU Horizon 2020 research and innovation programme for the Technological Educational Institute of Western Greece (04/2015-03/2016)
  6. Research project: “ISRTDI: Industrial Systems for Sustainable Development and Wellbeing – Research, Technological Development and Innovation – (ISRTDI)”. Research and developmental project with Industrial Systems Institute (ISI). (01/07/2013 – 31/10/2015).
  7. Project ICT Cost Action IC1202,“Timing Analysis on Code-Level (TACLe)”,European Cooperation in Science & Research, 2011-2015.
  8. Project ICT Cost Action IC1204,“Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE)”,European Cooperation in Science & Research, 2012-2016.
  9. Project ICT COST Action IC1306,“Cryptography for Secure Digital Interaction (Cryptoaction)”, European Cooperation in Science & Research, 2014-2018.
  10. Project ICT Cost Action IC1403,“Cryptanalysis of ubiquitous computing systems (CRYPTACUS)”,European Cooperation in Science & Research, 2014-2018.
  11. Research project: “Wireless sensor networks for Technical resources Cycle Operation Management – WelCOM”. Cooperation Action GSRT, Research and developmental project with Industrial Systems Institute (ISI)/Research Centre ATHENA.
  12. Research project: FP7-SEC-218123 SECRICOM “Seamless Communication for Crisis Management”, Research and developmental project withUniversity of Patras,
  13. Research project: FP7-SEC-218123 SECRICOM “Seamless Communication for Crisis Management”, Research and developmental project withHITACHI EUROPE SAS, Sophia Antipolis Lab.
  14. Research project: INFSO-ICT-224287, VITAL ++”Embedding P2P Technology in Next Generation Networks, A New Communication Paradigm & Experimentation Infrastructure”, Research and developmental project withUniversity of Patras.
  15. Development project: EPAEK «Electrical and Computer Engineering Department Program Update», work package 3, EPEAEK ΙΙ, University of Patras.
  16. Research project:IST-034284-STREP VITAL “Enabling convergence of IP Multimedia services over Next Generation Networks Technology”, Research and developmental project withUniversity of Patras.
  17. Research project: IST-1-507646-STP FLEXINET “Flexible Network and Gateways Architecture for enhanced  Access Network Services and Applications”, Research and developmental project withUniversity of Patras.
  18. Research project:00ΕPER90-Β: «Low Power Dissipation Bluetooth system » GSRT, Operational Programme “Competitiveness”.Research and developmental project withUniversity of Patras.

Professional Experience

October 2003 – January 2008

Researcher
  • Computer and hardware security researcher for R&Dprojects: 00ΕPΕR90-Β, FLEXINET, VITAL, EPEAEK ΙΙ

January 2009 – September 2010

Research/scientific Contractor-Senior Researcher  Hitachi Europe SAS
  • Hitachi Europe SAS Technical Manager for the EU project SECRICOM

January 2008 - today

Research/scientific Contractor-Senior Researcher : University of Patras
  • Scientific and Technical Manager for EU project CIPSEC, SMESEC, CONCORDIA
  • Scientific and Technical Manager for the EU project SECRICOM
  • Senior Researcher for p2p distributed security protocols for EU project VITAL++

September 2013 - today

Researcher contractor: Industrial Systems Institute (ISI), ATHENA R.C
  • Researcher on WelCOM Cooperation action for the development of Wireless Sensor Network protocols and signal processing.
  • Researcher on “ISRTDI: Industrial Systems for Sustainable Development and Wellbeing – Research, Technological Development and Innovation”.
  • Researcher on “I3T: Innovative Application of Industrial Internet of Things in Smart environments”.

Research Projects

2002-2006:  Teaching Assistant, Electrical & Computer Engineering Dept., University of Patras, Patras, Greece undergraduate Laboratory: “Introduction to Computers I– UNIX ”, 1st semester, 2002-2003,2003-2004, 2004-2005, 2005-2006. 2004-2005: Teaching Assistant, Electrical & Computer Engineering Dept., University of Patras, Patras, Greece undergraduate Laboratory: “Design of Integrated Systems using VLSI Techniques”, 9-th semester, 2004-2005. 2002-today: Supervision of many diploma theses on Cryptography Applications, Smart Card technology and Finite Field Arithmetic 2007-2014: Adjunct Faculty member (Assistant Professor) in Technical Educational Institute of Patras, outlier of Amaliada, Information Systems in Business Management and Economy Dpt Courses:
  • “Security in Information Systems”, 2007-2008, 2010-2011
  • “Design and Analysis of Information Systems” 2007-2008
  • “Computer Networks”, 2010-2011
  • “World Wide Web Design”, 2012-2013
Adjunct Faculty member (Laboratory Associate/Lecturer) in Technical Educational Institute of Patras, Electrical Engineering Dpt, Mechanical Engineering Dpt, Courses:
  • Microcomputers I 2007-2014
  • Microcomputers II 2009-2010
  • Computer Architecture 2009-2010
  • Electric Circuit Principles 2012-2013
2008-today: Adjunct Faculty member (Assistant Professor) in Computer Engineering and Informatics Dpt, University of Patras, Courses:
  • Microcomputers (2008, 2017-2019)
  • Electronics I (2008-2019)
  • Computer Architecture (2008-2017)
2012-2014: Adjunct Faculty member (Assistant Professor) in Technological Educational Institute of Patras, Mechanical Engineering Dpt, Courses:
  • Electrical Systems (2012-2014)
2013-2015: Adjunct Faculty member (Assistant Professor) in Technological Educational Institute of Western Greece, Business Management Dpt, Courses:
  • Information Systems Security
2014-today: Adjunct Faculty member (Assistant Professor) in Technological Educational Institute of Western Greece, Computer And Informatics Engineering Dpt, UnderGraduate Courses:
  • Digital Logic
  • Analog and Digital Systems
  • Cryptography and Computer Security Lab
  • Typical Systems Analysis Lab
  • Hardware Security Lab
  • System on Chip
  • Network Architecture Systems and Processors
  • Real time Systems
  • Design and Implementation Verification Systems
Graduate Courses:
  • Principles of Secure Systems
  • Digital Signal Processing and Hardware Design
 

Other Skills and Activities

Communities
  • Member of the Greece Technical Chamber (TEE).
  • Member of IEEE, IEEE Computer Society, IEEE Circuits and Systems Society
  • Member of International Association for Cryptologic Research (IACR)
Languages
  • English (Cambridge Proficiency Certificate)
  • Greek (Native)

Experience on Computer Systems

  •   Extended knowledge of CAD tools for VLSI: Xilinx ISE suite , Mentor Graphics, SYNOPSYS.
  •   Hardware Description Languages: Extended Knowledge of VHDL.
  •   Knowledge of Network Management, Vulnerability & Monitoring Tools.
  •   Knowledge of programming languages: C-C++, Java, Prolog , FORTRAN, Visual Basic, Python.
  •   Knowledge of mathematical software: MATLAB, MATHEMATICA, MATHCAD, Sage, GMP
  •   Knowledge of SPICE Simulation tools.

Reviewer - Referee

Conferences

  • MELECON 2004
  • ISCAS 2004
  • MWSCAS 2003
  • EUROCON 2005
  • CONTEL 2005
  • ISCAS 2006
  • UASS 2006
  • CSNDSP2006
  • ISCAS2007
  • ISWPC 2008
  • ICECS 2008
  • ICECS 2009
  • ICECS 2010
  • ISCAS 2011
  • NTMS 2011 (technical committee member)
  • NTMS 2012
  • GWVLSI 2013
  • ISCAS 2015
  • EuroMicro DSD 2011-2012-2013-2014

Journals

  • IEEE Transactions on Computer
  • IEEE Computer
  • IEEE Transactions on Circuit and Systems I
  • IEEE Transactions on Circuit and Systems II
  • IEEE Transactions on VLSI Systems
  • International Arab Journal of Information Technology (IAJIT)
  • International Journal of Intelligent Automation and Soft Computing (AutoSoft)
  • Circuits, Systems and Signal Processing, Springer
  • The VLSI Integration Journal, Elsevier Ltd.
  • Microprocessors and Microsystems, Elsevier Ltd
  • Journal of Circuits, Systems and Computers
  • Computers and Electrical Engineering, Elsevier
  • Information Systems Security, The official journal of (ISC)2, Taylor&Francis
  • Information Sciences, Elsevier Ltd
  • Information Security Journal: A Global Perspective, Taylor&Francis
  • Research Letters in Electronics, Hindawi Publishing
  • International Journal of Reconfigurable Computing, Hindawi Publishing
  • The EURASIP Journal on Wireless Communications and Networking
  • Information Processing Letters, Elsevier Ltd
  • Journal of Network and Computer Applications, Elsevier Ltd
  • Journal of Parallel and Distributed Computing, Elsevier Ltd
  • Journal of Systems and Software, Elsevier Ltd
  • ACM Transactions on Reconfigurable Technology and Systems
  • International Journal of Computer Mathematics, Taylor and Francis

Journal - Conference – European Organization committee membership

Conference Technical Program Committee member

  1. 4th IFIP International Conference on New Technologies, Mobility and Security(NTMS ‘11), 7 – 10 February, Paris, France, 2011
  2. SECRICOM Final Conference2012, April 26th Warsaw, Poland, 2012.
  3. First International Symposium on Security in Computing and Communications (SSCC’13), August 22-24, 2013, Mysore, India
  4. Euromicro Conference on Digital System Design(DSD) 2013, September 4-6, Santander, Spain, 2013.
  5. 1st Security in Adhoc Networks (SecAN) Workshop, Benidorm Spain – June 22-27, 2014.
  6. Second International Symposium on Security in Computing and Communications (SSCC-2014)September 24-27, 2014  Greater Noida,India
  7. Euromicro Conference on Digital System Design (DSD)2014, August 27-29, Verona, Italy, 2014
  8. Third International Symposium on Security in Computing and Communications (SSCC-2015), August 10-13, 2015. Kerala, God’s Own Country, India, 2015.
  9. IEEE Computer Society Annual Symposium on VLSI 2015 (ISVLSI 2015), System Design and Security (SDS) Track, 08 – 10 July, Montpellier, France, 2015.
  10. Euromicro Conference on Digital System Design (DSD)2015, August 26-28, Funchal, Madeira, Portugal, 2015
  11. 1st IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2015, Indore, India, December 21st-23rd, 2015.
  12. International Workshop on Components and Services for IoT platforms: Paving the way to IoT standards, (WCS-IoT 2015), Imperial College, London, United Kingdom, 4 September 2015.
  13. IEEE Computer Society Annual Symposium on VLSI 2016 (ISVLSI 2016), System Design and Security (SDS) Track, 11 – 13 July, Pittsburgh, PA, USA, 2016.
  14. Forth International Symposium on Security in Computing and Communications (SSCC-2016), September 21-24, 2016, Jaipur, India
  15. 2nd IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016, Gwalior, INDIA,  Dec. 19-21, 2016
  16. Fifth International Symposium on Security in Computing and Communications (SSCC’17),September 13-16, 2017, Manipal, India.
  17. IEEE Computer Society Annual Symposium on VLSI 2017 (ISVLSI 2017), System Design and Security (SDS) Track, 03 – 05 July, Bochum, Germany, 2017.
  18. 3nd IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2017, Bholap, INDIA,  Dec. 18-20, 2017
  19. 3rd International Conference on Information Systems Security and Privacy (ICISSP 2017), Porto, Portugal, 19-21 February 2017.
  20. Euromicro Conference on Digital System Design (DSD)2017, August 30-September 2, Vienna, Austria, 2017
  21. ARC 2018, the 14th International Symposium on Applied Reconfigurable Computing,2 – 4 May 2018, Santorini, Greece.
  22. Euromicro Conference on Digital System Design (DSD)2018, August 27-30, Prague, Czech Republic, 2018
  23. IEEE Computer Society Annual Symposium on VLSI 2018 (ISVLSI 2018), System Design and Security (SDS) Track, July 9-11, 2018, Hong Kong SAR, China.
  24. Sixth International Symposium on Security in Computing and Communications (SSCC-2018), September 19-22, Bangalore, India, 2018.
  25. Euromicro Conference on Digital System Design (DSD)2018, August 28-August 31, Prague, Czech Republic, 2018
  26. 4th IEEE INTERNATIONAL SYMPOSIUM ON SMART ELECTRONIC SYSTEMS December 17-19, 2018, Hyderabad, India.
  27. 4th International Conference on Information Systems Security and Privacy (ICISSP 2018), Funchal, Madeira, Portugal, 22-24 January 2018.
  28. 5th International Conference on Information Systems Security and Privacy (ICISSP 2019), Prague, Czech Republic, 23-25 February 2019.

Workshop-Conference organization

  • Organizer, General Chair:S-CI 2017, International Workshop on Securing Critical Infrastructures held in conjunction with the ARES EU Projects Symposium 2017, at ARES August 29 – September 1, 2017, Reggio Calabria, Italy, ARES EU Projects Symposium: August 29, 2017
  • Organizer, Publicity and Publication chair:International workshop on Information & Operational Technology (IT & OT) security systems (IOSec 2018) collocated with RAID 2018 conference, 13 September 2018 – Heraklion, Crete, Greece
  • Thematic Session organizer:Thematic Session: “Protecting industry infrastructure data, network and storage assets from cybersecurity attacks” hiPEAC Computing System Week CSW Heraklion, October 29-31, 2018

Conference Technical Program Committee track chair

  • Track Chair on Hardware for Secure Information Processing (SIP):
    2nd IEEE International Symposium on Nanoelectronic and Information Systems    , iNIS 2016, Gwalior, INDIA,  Dec. 19-21, 2016.
  • Track Chair on Hardware for Secure Information Processing (SIP):
    3nd IEEE International Symposium on Nanoelectronic and Information Systems    , iNIS 2017, Bholap, INDIA,  Dec. 18-20, 2017
  • Track Chair on Hardware for Secure Information Processing (SIP): 4th IEEE INTERNATIONAL SYMPOSIUM ON SMART ELECTRONIC SYSTEMS December 17-19, 2018, Hyderabad, India

Journal Editorial Board member

  • Information Security Journal: A Global Perspective, Taylor&Francis

Summer School Program Committee member and Trainer

  • 2nd  ATHENA Summer School, Wireless Technologies & Applications, Pyrgos, Greece, 3 – 8 July , 2011.
  • 3nd  ATHENA Summer School, Algorithms Telecom Hardware Encryption Networks Applications, Pyrgos, Greece, 1 – 6 July , 2012.
  • 2nd TRUDEVICE Training School on Trustworthy Manufacturing and Utilization of Secure Devices, Leukerrbad, Switzerland ,April 17- 22, 2016.
  • 2nd ICT and Applications Summer School, 3-5 July, Patra, Greece, 2017

EU Cost Actions

  • Management Committee Member COST Action IC1202 TΑckle (Greek Representative).
  • Management Committee Substitute Member COST Action IC1204 TRUDEVICE (Greek Representative).
  • Management Committee Substitute Member COST Action IC1306 CryptoAction (Greek Representative).
  • Management Committee Substitute Member COST Action IC1403 CRYPTACUS (Greek Representative).

Publications

Conferences

  1. Apostolos Fournaris, Lampros Pyrgas and Paris Kitsos, “An FPGA Hardware Trojan Detection Approach Based on Multiple Parameter Analysis”, in proc. of Euromicro DSD/SEAA 2018 conference, Prague, Czech Republic, , August 29 – 31, 2018.
  2. Apostolos P. Fournaris, Konstantinos Lampropoulos and Odysseas Koufopavlou, “End Node Security and Trust vulnerabilities in the Smart City Infrastructure”, in proc. of 5th International Conference of Engineering Against Failure (ICEAF-V 2018), vol. 18, Chios, Greece, June 20-22, 2018.
  3. Christos Anagnostopoulos, Christos Alexakos, Apostolos Fournaris, Christos Koulamas and Athanasios Kalogeras, “Responding to Failure Events in the Manufacturing Environment”, in proc. of 5th International Conference of Engineering Against Failure (ICEAF-V 2018), vol. 18, Chios, Greece, June 20-22, 2018
  4. C. Alexakos, C. Anagnostopoulos, A. P. Fournaris, C. Koulamas, A. Kalogeras, IoT Integration for Adaptive Manufacturing, in proc. of 21st IEEE International Symposium On Real-Time Computing (IEEE ISORC 2018), Singapore, May 29 – 31, 2018
  5. A. P. Fournaris, K. Lampropoulos, O. Koufopavlou, Trusted Hardware Sensors for Anomaly Detection in Critical Infrastructure Systems, in proc. of International Conference on Modern Circuits and Systems Technologies (MOCAST) on Electronics and Communications, 7 – 9 May 2018 Thessaloniki Greece.
  6. A. Moschos, A. P. Fournaris, O. Koufopavlou, A Flexible Leakage Trace Collection Setup for Arbitrary Cryptographic IP Cores, in proc. of IEEE International Symposium on Hardware Oriented Security and Trust 2018 (IEEE HOST 2018), Washington DC, USA, April 30 – May 4, 2018
  7. S. Zouzoula, N. Sklavos, A. P. Fournaris, Design and Implementation of a Security Processor for Satellite Communication Systems, Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2018) workshop, Design Automation and Testing in Europe (DATE) 2018 conference, Dresden, Germany, March 19-23, 2018.
  8. C. Alexakos, C. Anagnostopoulos, A. P. Fournaris, A. Kalogeras and C. Koulamas, Production Process Adaptation to IoT Triggered Manufacturing Resource Failure Events, 22nd IEEE Conference on Emerging Technologies and Factory Automation (ETFA 2017), September 12-15, 2017 – Limassol, Cyprus.
  9. A. P. Fournaris, C. Dimopoulos, O. G. Koufopavlou, “A Design Strategy for Digit Serial Multiplier based Binary Edwards Curve Scalar Multiplier Architectures”, in proc of Euromicro Conference on Digital System Design 2017 (DSD 2017), 30 August -1 September, Vienna, Austria, 2017.
  10. A. P. Fournaris, K. Lampropoulos, O. G. Koufopavlou, “Hardware Security for Critical Infrastructures – The CIPSEC Project Approach” in proc. of IEEE Computer Society Annual Symposium on VLSI 2017 (ISVLSI 2017) Bochum, Germany, 3- 5 July 2017.
  11. A. P. Fournaris, L. Papachristodoulou and N. Sklavos, “Secure and Efficient RNS software implementation for Elliptic Curve Cryptography”, in proc. of IEEE European Symposium on Security and Privacy workshops, Security for Embedded and Mobile Systems (SEMS 2017), Paris, France, 30 April 2017.
  12. A. P. Fournaris, L. Papachristodoulou, L. Batina, and N. Sklavos, “Residue Number System as a Side Channel and Fault Injection Attack Countermeasure in Elliptic Curve Cryptography”, in proc. of Final TRUDEVICE conference, Barcelona, 14-16 November 2016.
  13. I. Tzemos, A.P. Fournaris and N. Sklavos, “Security and Efficiency Analysis of One Time Password Techniques”, 20th Panhellenic Conference on Informatics, 10-12 November 2016, Patras, Greece.
  14. C. Emmanouilidis, P. Pistofidis, A. P. Fournaris, M. Bevilacqua, I. Durazo-Cardenas, P. N Mpotsaris, V. Katsouros, C. Koulamas and A. Starr, “Context-based and human-centred information fusion in diagnostics”, 3rd IFAC Workshop on Advanced Maintenance Engineering, Service and Technology, (AMEST’16), Biarritz, France October 19-21, 2016.
  15. A. P. Fournaris, L. Papachristodoulou, L. Batina, and N. Sklavos, “Residue Number System as a Side Channel and Fault Injection Attack Countermeasure in Elliptic Curve Cryptography” 11th International Conference on Design &Technology of Integrated Systems in Nanoscale Era, April 12-14, 2016, Istanbul, Turkey
  16. A. P. Fournaris, N. Sklavos and C. Koulamas, “A High Speed Scalar Multiplier for Binary Edwards Curves” in ACM proceedings of CS²: Cryptography and Security in Computing Systems Workshop, hiPEAC Conference, 20 January, Prague, 2016.
  17. A. P. Fournaris and N. Sklavos, “Binary Edwards Curve Design Strategy for Efficient and Power Attack Resistant Architectures” in the 4th Workshop On Secure Hardware And Security Evaluation (TRUDEVICE 2015), Co-located with CHES Workshop 2015, 17 September, Saint-Malo, France.
  18. V. Katsouros, C. Koulamas, A. P. Fournaris and C. Emmanouilidis, Embedded event detection for self-aware and safer assets, to appear in proc, 9th IFAC Symposium on Fault Detection, Supervision and Safety of Technical Processes, SafeProcess 2015, Paris, France, September 2-4, 2015.
  19. A. P. Fournaris and O. Koufopavlou, “Affine Coordinate Binary Edwards Curve Scalar Multiplier with Side Channel Attack Resistance” in proc. of 18th Euromicro Conference on Digital Systems Design, August 26-28, 2015, Madeira, Portugal.
  20. A. P. Fournaris, J. Zafeirakis, C. Koulamas, N. Sklavos and O. Koufopavlou, “Designing Efficient Elliptic Curve Diffie-Hellman Accelerators for Embedded Systems” in proc of 2015 IEEE International Symposium on Circuits and Systems (ISCAS 15), Lisbon, May 24 – 27, Portugal, 2015.
  21. R. Chaves, G. D. Natale, L. Batina, S. Bhasin, B. Ege, A.P. Fournaris, N. Mentens, S. Picek, F.Regazzoni, V. Rozic, N. Sklavos and B. Yang, “Challenges in Designing Trustworthy Cryptographic Co-Processors” in proc of 2015 IEEE International Symposium on Circuits and Systems (ISCAS 15), Lisbon, May 24 – 27, Portugal, 2015.
  22. A. P. Fournaris ,N. Sklavos, Public Key Cryptographic Primitive Design and Protection Against Fault and Power Analysis Attacks, to appear in TRUDEVICE Workshop 2015, 13 March, Grenoble 2015.
  23. A. P. Fournaris, N. Klaoudatos, N. Sklavos and C. Koulamas, Fault and Power Analysis Attack Resistant RNS based Edwards Curve Point Multiplication, in ACM proceedings of CS²: Cryptography and Security in Computing Systems Workshop, hiPEAC Conference, 19 January, Amsterdam, 2015.
  24. A. Bikos, N.Sklavos, A.P. Fournaris, “On the Optimization of S-Box Functionality in 4G LTE Ciphers”, in proc. of Joint MEDIAN–TRUDEVICE Open Forum, Sep. 30, 2014 – Amsterdam, Netherlands.
  25. A. P. Fournaris, J. Zafeirakis and O. Koufopavlou, “Designing and Evaluating High Speed Elliptic Curve Point Multipliers”, in proc. of 17th Euromicro Conference on Digital Systems Design, August 27-29, 2014, Verona, Italy.
  26. A. Fournaris, D. Hein, J. Fournier, G. Reymond, H. Brandl, “A Secure Docking Module for providing trust in Crisis Management Incidents” in proc. of 11th IEEE International Conference on Industrial Informatics (INDIN 2013), Bochum, Germany, July 29-31, 2013.
  27. A.P. Fournaris and O. Koufopavlou, “CRT RSA Hardware Architecture with Fault and Simple Power Attack Countermeasures”, in proc. of  Euromicro Conference on Digital System Design (DSD), Ismir, Turkey, September 5-8, 2012.
  28. A.P. Fournaris and O. Koufopavlou, “Protecting CRT RSA against Fault and Power Side Channel Attack” in proc. of IEEE Computer Society Annual Symposium on VLSI 2012, University of Massachusetts, Amherst, USA, August 19-21, 2012.
  29. A.P. Fournaris, “Distributed Threshold Certificate Based Encryption Scheme with no Trust Dealer” in proc. of International Conference on Security and Cryptography (SECRYPT), Rome, Italy, July 24-27, 2012.
  30. A. P. Fournaris and O. Koufopavlou, “Efficient CRT RSA with SCA countermeasures”  in proc. of  14th Euromicro Conference on Digital System Design (DSD 11), Oulu, 31 August- 2 September, Finland.
  31. A. P. Fournaris, “Distributed Threshold Cryptography Certification With No Trusted Dealer,” in proc of  International Conference on Security and Cryptography 2011 (SECRYPT ’11), Seville, 18-21 July 2011, Spain.
  32. A. P. Fournaris,” Hardware Module Design for Ensuring Trust” in proc of IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2010), Kefalonia, Greece, 5-7 July 2010.
  33. A. P. Fournaris, “Fault and Simple Power Attack Resistant RSA using Montgomery Modular Multiplication”, in proc of 2010 IEEE International Symposium on Circuits and Systems (ISCAS 10), Paris, France, 29th May -2 July 2010.
  34. A. P. Fournaris and O. Koufopavlou, “One Dimensional Systolic Inversion Architecture Based on Modified G(2k) Extended Euclidean Algorithm” in proc of 2009 12th Euromicro Conference on Digital System Design (DSD), Patras, August 27 – 29, Greece, 2009.
  35. A. P. Fournaris and O. Koufopavlou, “Low Area Elliptic Curve Arithmetic Unit” in proc of 2009 IEEE International Symposium on Circuits and Systems (ISCAS 09), Taipei, May 24 – 27, Taiwan, 2009.
  36. A. P. Fournaris and O. Koufopavlou, “Creating an Elliptic Curve Arithmetic Unit for use in Elliptic Curve Cryptography”, in proc. of13th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA 2008), September 15-18, , Hamburg, Germany, 2008
  37. G. N. Selimis, A. P. Fournaris and O. Koufopavlou, “Applying Low Power Techniques in AES MixColumn/InvMixColumn Transformations “,in proc. 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), Nice, December 10 – 13, France, 2006.
  38. A. P. Fournaris and O. Koufopavlou, “A Systolic Inversion Architecture Based on Modified Extended Euclidean Algorithm for GF(2k) Fields “,in proc. 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), Nice, December 10 – 13, France, 2006.
  39. D. M. Schinianakis, A. P. Fournaris, A. Kakarountas and T. Stouraitis,“An RNS Architecture of an Fp Elliptic Curve Point Multiplier” in proc of 2006 IEEE International Symposium on Circuits and Systems (ISCAS 06), Kos, May 21 – 24, Greece, 2006.
  40. A. P. Fournaris, O. Koufopavlou, “A novel systolic GF(2k) field Multiplication-Inversion arithmetic unit” in proc. 12th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2005), Gammarth, December 11-14, Tunisia, 2005.
  41. A. P. Fournaris, O. Koufopavlou, “A Systolic Trinomial GF(2k) Multiplier based on the Montgomery Multiplication Algorithm” in proc. 12th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2005), Gammarth, December 11-14, Tunisia, 2005.
  42. A. P. Fournaris, O. Koufopavlou, “A New RSA Encryption Architecture and Hardware Implementation based on Optimized Montgomery Multiplication”in proc. of 2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, May 23 -26, Japan, 2005
  43. A. P. Fournaris, O. Koufopavlou, “Optimized GF(2k) ONB Type I Multiplier Architecture based on the Massey – Omura Multiplication Pattern” in proc. of 2nd conference on Microelectronics Microsystems and Nanotechnology (MMN 2004), Athens, November 14 -17, Greece, 2004.
  44. N. Sklavos, A. P. Fournaris, O. Koufopavlou,  “WAP Security, Implementation Cost and Performance Evaluation of a Scalable Architecture for RC5 Parameterized Block Cipher”  in proc. of 12th IEEE Mediterranean Electrotechnical Conference (MELECON 2004) , May 12-15, Dubrovnik, Croatia, 2004.
  45. A. P. Fournaris, O. Koufopavlou,  “GF(2k) Multipliers based on the Montgomery Multiplication Algorithm”  in proc. of the 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, May 23 – 26, Canada, 2004
  46. A. P. Fournaris, O. Koufopavlou,  “Montgomery Modular Multiplier Architectures and Hardware Implementations for an RSA Cryptosystem”  in proc. of 46th IEEE Midwest Symposium on Circuits & Systems ’03 (MWSCAS 2003), December 27-30, Cairo, Egypt, 2003.
  47. A. P. Fournaris, N. Sklavos and O. Koufopavlou, “Vlsi architecture and FPGA Implementation of ICE Encryption Algorithm” , in proc. of 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003), United Arab Emirates, December 14-17, 2003.

Journals

  1. Apostolos Fournaris, Lampros Pyrgas and Paris Kitsos, “Defining and Analyzing Multiple Parameters for FPGA based Hardware Trojan Detection”, submitted to in Microprocessors and Microsystems Journal, Elsevier, 2019.
  2. Louiza Papachristodoulou, Apostolos P. Fournaris, Kostas Papagiannopoulos, Lejla Batina, “Practical Evaluation of Protected Residue Number System Scalar Multiplication”, to appear in IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), vol.1, 2019
  3. Apostolos P. Fournaris, Christos Alexakos, Christos Anagnostopoulos, Christos Koulamas, Athanasios Kalogeras, “Introducing Hardware based Intelligence and Reconfigurability on Industrial IoT Edge Nodes”, under major revision in IEEE Design & Test Magazine, 2018.
  4. A. P. Fournaris, C. Dimopoulos, A. Moschos, O. G. Koufopavlou “Design and Leakage Assessment of Side Channel Attack Resistant Binary Edwards Elliptic Curve Digital Signature Algorithm Architectures”, to appear in Microprocessors and Microsystems Journal, Elsevier, 2018.
  5. A. P. Fournaris, L. Pocero Fraile, O. Koufopavlou, “Exploiting Hardware Vulnerabilities to Attack Embedded System Devices: A Survey of Potent Microarchitectural Attacks,” Electronics, vol. 6, no. 3, p. 52, Jul. 2017.
  6. A.P. Fournaris, I. Zafeirakis, P. Kitsos, O. Koufopavlou, Comparing Elliptic Curve Point Multiplication Design approaches for Cryptography, , Microprocessors and Microsystems, vol. 39, no. 8, pp. 1139–1155, Aug. 2015
  7. A.P. Fournaris and N.Sklavos, “Secure embedded system hardware design – A flexible security and trust enhanced approach”, Computer and Electrical Engineering Journal, vol:40, pp 121-133, Elsevier Ltd. January 2014.
  8. A. P. Fournaris, “A Distributed Approach of a Threshold Certificate Based Encryption Scheme with No Trusted Entities” Information Security Journal: A Global Perspective,  July 2013, Taylor and Francis.
  9. W. Wojciechowicz, J. Fournier, M. Konecny, S. Vanya, J. Stoodley, P. Entwisle, D. Hein, A. Machalek, A. Fournaris, M. Uriarte, O. Lopez, S. O’Neill, H. Bradl, Z. Balogh, E. Gatial, L. Hluchy, T. Mirosław, J. Zych,“Seamless Communication For Crisis Management”  in the journal “Technical Sciences”, University of Warmia and Mazury publishing, Poland, July 2012.
  10. A.P. Fournaris, J. Fournier, D. Hein & G. Reymond,“Secure Docking Station and its protection against hardware attacks”  in the journal “Technical Sciences”, University of Warmia and Mazury publishing, Poland, July 2012.
  11. Apostolos P. Fournaris, “Toward Flexible Security and Trust Hardware Structures for Mobile-Portable Systems”, IEEE Transactions on Latin America, Volume 10 Issue 3, April 2012.
  12. Apostolos P. Fournaris “Trust Ensuring Crisis Management Hardware Module“, Information Security Journal: A Global Perspective, Volume 19, Issue 2, Taylor and Francis, 2010.
  13. D. M. Schinianakis, A. P. Fournaris, H. Michail, A. P. Kakarountas and T. Stouraitis, “An RNS Implementation of an Fp Elliptic Curve Point Multiplier” IEEE Transactions on Circuits and Systems I: Regular Papers 56 (6), pp. 1202-1213, 2009.
  14. G. N. Selimis, A. P. Fournaris, G. Kostopoulos and O. Koufopavlou, “Software and Hardware Issues in Smart Card Technology”, IEEE Communications Surveys & Tutorials, Vol. 11, No. 3, Third Quarter 2009.
  15. G. N. Selimis, A. P. Fournaris, H. E. Michail and O. Koufopavlou, “Improved Throughput Bit-Serial Multiplier for GF (2m) Fields” The VLSI Integration Journal, Volume 42/2, February 2009, Pages 217-226, Elsevier Ltd.
  16. A. P. Fournaris and O. Koufopavlou, “Versatile Multiplier Architectures in GF(2k) Fields using the Montgomery Multiplication Algorithm” The VLSI Integration Journal, vol. 41/3, pp. 271-284, Elsevier Ltd.
  17. G. N. Selimis, A. P. Kakarountas , A. P. Fournaris, A. Milidonis and O. Koufopavlou, A Low Power Design For Sbox Cryptographic Primitive Of Advanced Encryption Standard For Mobile End –Users” Journal of Low Power Electronics (JOLPE), vol.3, no. 3, pp. 327-336(10), December 2007.
  18. A. P. Fournaris and O. Koufopavlou, “Applying Systolic Multiplication-Inversion Architectures Based On Modified Extended Euclidean Algorithm For GF(2k) in Elliptic Curve Cryptography” Special Issue “Security of Computers & Networks”, Computer and Electrical Engineering Journal, vol.33,  issue 5-6, pp 333-348, Elsevier Ltd, September 2007.

Book Chapters

  1. A. P. Fournaris, A. Moschos, N. Sklavos, “Side Channel Analysis Attack Assessment Platforms and Tools for Ubiquitous Systems” book chapter to appear in “Cryptanalysis in Ubiquitous Computing Systems”, Springer International Publishing, 2019
  2. A. P. Fournaris, Fault and Power Analysis Attack Protection Techniques for Standardized Public Key Cryptosystems, Book Chapter in Sklavos, N., Chaves, R., Di Natale, G., Regazzoni, F, book “Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment”, Springer International Publishing, 2017.
  3. A. P. Fournaris, G. Keramidas, K. Ispoglou and N. Voros,“VirISA: Recruiting Virtualization and Reconfigurable Processor ISA for Malicious Code Injection Protection”Book Chapter in Components and Services for IoT Platforms: Paving the Way for IoT Standards, Springer, 2016.
  4. C. Koulamas, S. Giannoulis and A. P. Fournaris ,“IoT Components for Secure Smart Building Environments” Book Chapter in Components and Services for IoT Platforms: Paving the Way for IoT Standards, Springer, 2016.
  5. Ricardo Chaves, Leonel Sousa, Nicolas Sklavos, Apostolos P. Fournaris, Georgina Kalogeridou, Paris Kitsos, and Farhana Sheikh “Secure Hashing: SHA-1, SHA-2, and SHA-3” Book Chapter in Circuits and Systems for Security and Privacy,CRC Press, 2016.
  6. Apostolos P. Fournaris, Georgios Keramidas, “From Hardware Security Tokens to Trusted Computing and Trusted Systems“, Book Section in System-Level Design Methodologies for Telecommunication, Editors: Nicolas Sklavos, Michael Hübner, Diana Goehringer, Paris Kitsos, Springer International Publishing , 2014
  7. A. P. Fournaris, P. Kitsos, N. Sklavos, “Security and Cryptographic Engineering in Embedded Systems”, Chapter in the Book: Encyclopaedia of Embedded Computing Systems, IGI Global, ISBN:9781466639225, 2013.
  8. A. P. Fournaris, D M Hein, “Trust Management Through Hardware Means: Design Concerns and Optimizations”, book chapter  in “Designing Very Large Scale Integration Systems: Emerging Trends & Challenges”,edts: N. Voros, A. Mukherjee, N. Sklavos, K. Masselos, M. Huebner , Springer, 2011.
  9. A. P. Fournaris and O. Koufopavlou, “Hardware Design Issues in Elliptic Curve Cryptography for Wireless Systems”, book chapter in “Wireless Security and Cryptography: Specifications and Implementations” Edt: N. Sklavos and X.Zhang, pp 79-151, Taylor & Francis Group, CRC Press, 2007.

Books

  1.  Apostolos P. Fournaris, Kostas Lampropoulos, Eva Marin Tordera (editors), “Information & Operational Technology (IT & OT) security systems: IOSEC 2018”, LNCS proceedings, Springer, 2019 (under publication).

Presentations - Seminars - Keynote Speech

  1. Athanassios Moschos, Apostolos Fournaris and Nicolas Sklavos, “A Leakage Trace Collection Approach for Arbitrary Cryptographic IP Cores“, Cryptacus Workshop, 16 – 18 November 2017,Nijmegen – Netherlands.
  2. Maria Katsaiti, Nicolas Sklavos and Apostolos Fournaris, “FPGA Performance Optimization for CAESAR Authentication Ciphers“, Cryptacus Workshop, 16 – 18 November 2017,Nijmegen – Netherlands.
  3. A. P. Fournaris, “Securing Critical Infrastructures through hardware means: Strong points and weaknesses of Hardware security tokens”, 1st CIPSEC Training Session, Co-located with ISCC 2017, Monday, July 3, 2017, Hrakleion, Greece.
  4. A. P. Fournaris, L. Pocero Fraile, “Exploring hardware exploitations for attacking Critical infrastructures devices” 1st CIPSEC Workshop, Vilanova i la Geltrú (Barcelona, Spain), 14 June 2017.
  5. A. P. Fournaris, “Innovative cryptographic solutions” 1st CIPSEC Workshop, Vilanova i la Geltrú (Barcelona, Spain), 14 June 2017.
  6. N. Sklavos A. P. Fournaris, “Microprocessor Design and Programming: Modern Trends and Future Applications” 2nd ICT and Applications Summer School, 3-5 July, Patra, Greece, 2017.
  7. Nicolas Sklavos, Apostolos Fournaris, “White-Box Cryptography, and AES Implementations” 2nd Cryptography for Secure Digital Interaction Symposium, March 27-28, Amsterdam, The Netherlands, 2017.
  8. A. P. Fournaris, “From Hardware to Software to System: Trusted embedded Nodes in IoT”, CRYPTACUS Workshop and Meeting, 6th and 7th November 2016, Sophia Antipolis.
  9. A. P. Fournaris, “Implementation attacks on the arithmetic of popular Public Key Cryptosystems”, 2nd TRUDEVICE Training School on Trustworthy Manufacturing and Utilization of Secure Devices, Leukerrbad, Switzerland ,April 17- 22, 2016.
  10. Apostolos P. Fournaris, “Residue Number System as a Side Channel Attack and Fault Injection attack Countermeasure”, CryptoAction Symposium 2016, April 6 – 8, 2016. Budapest, Hungary
  11. A. P. Fournaris, N. Klaoudatos, “Designing Secure Elliptic Curve Scalar Multipliers Using The Residue Number System”, HiPEAC Computing Systems Week, “Hardware Security and Trust: Design, Manufacture and Deployment of Integrated Circuits” Thematic Session, Athens, October 2014
  12. N. Klaoudatos, A. P. Fournaris, N. Sklavos, O. Koufopavlou,  “Designing Fault Injection And Side Channel Attack Resistant Edward Curve Scalar Multipliers Using Residue Number System”, 2nd TRUDEVICE workshop, Freiburg, December 12-13, 2013.
  13. A. P. Fournaris, “Designing Hardware Protected Cryptographic Accelerators For Trusted Computing Systems“, 3rd ATHENA Summer School, Pyrgos, GREECE, 1 to 6 July, 2012.
  14. A. P. Fournaris, “Secure docking station and its protection against hardware attacks”, International Scientific Conference”, Seamless Communication for Crisis Management (SECRICOM’12), Warsaw, 26th April 2012.
  15. A. P. Fournaris, “Elliptic Curve Cryptography as a Security Enhancement on Modern Network Systems“, 2nd ATHENA Summer School, Pyrgos, GREECE, 3 to 8 July, 2011.

Technical reports

  1. M. Scheibe, D. Hein, G. Reymond, J. Fournier, A. P. Fournaris, V. Hudek, L. Slovak – “SECRICOM WP5 Design of the Chip and Emulator”, INFINEON AG, 2011.
  2. D. Hein, P. Danner, A. P. Fournaris, M. Liebl – “SECRICOM WP5 Functional specification of the Secure Docking Module”, Technical Report, IAIK, 2009.
  3. I. Kočiš, A. Aldabbagh, O. Lázaro, O. López, M. Uriarte, D. Hein, P. Danner, T. Miroslaw, M. Świech, W. Dymowski, L. Hluchý, B. Ŝimo, Z. Balogh, V. Hudek, A. Machalek, A. P. Fournaris, J. Fournier – “Secricom WP 2 Analysis of external and internal system requirements”, Technical Report, IAIK, 2009.